76 lines
1.5 KiB
Plaintext
76 lines
1.5 KiB
Plaintext
EESchema-LIBRARY Version 2.4
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#encoding utf-8
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#
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# Device_R
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#
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DEF Device_R R 0 0 N Y 1 F N
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F0 "R" 80 0 50 V V C CNN
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F1 "Device_R" 0 0 50 V V C CNN
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F2 "" -70 0 50 V I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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R_*
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$ENDFPLIST
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DRAW
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S -40 -100 40 100 0 1 10 N
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X ~ 1 0 150 50 D 50 50 1 1 P
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X ~ 2 0 -150 50 U 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Transistor_BJT_BCX53
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#
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DEF Transistor_BJT_BCX53 Q 0 0 Y N 1 F N
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F0 "Q" 200 75 50 H V L CNN
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F1 "Transistor_BJT_BCX53" 200 0 50 H V L CNN
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F2 "Package_TO_SOT_SMD:SOT-89-3" 200 -75 50 H I L CIN
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F3 "" 0 0 50 H I L CNN
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ALIAS BCX52 BCX53
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$FPLIST
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SOT?89*
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$ENDFPLIST
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DRAW
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C 50 0 111 0 1 10 N
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P 2 0 1 0 0 0 25 0 N
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P 2 0 1 0 100 -100 25 -25 N
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P 2 0 1 0 100 100 25 25 N
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P 3 0 1 20 25 75 25 -75 25 -75 F
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P 5 0 1 0 55 -75 75 -55 35 -35 55 -75 55 -75 F
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X B 1 -200 0 200 R 50 50 1 1 I
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X C 2 100 200 100 D 50 50 1 1 P
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X E 3 100 -200 100 U 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# power_GND
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#
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DEF power_GND #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -250 50 H I C CNN
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F1 "power_GND" 0 -150 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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DRAW
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P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
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X GND 1 0 0 0 D 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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# pspice_VSOURCE
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#
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DEF pspice_VSOURCE V 0 40 Y Y 1 F N
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F0 "V" -250 300 50 H V C CNN
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F1 "pspice_VSOURCE" 0 0 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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DRAW
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C 0 0 200 0 1 0 N
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T 0 -320 -10 50 0 0 1 V Normal 0 C C
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P 2 0 1 0 -250 -250 -250 150 F
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P 3 0 1 0 -300 150 -250 250 -200 150 F
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X E1 1 0 300 100 D 50 50 1 1 I
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X E2 2 0 -300 100 U 50 50 1 1 I
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ENDDRAW
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ENDDEF
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#
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#End Library
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